Von Neumann Architecture

Prior to von Neumann

John von Neumann

Preliminary Discussion of the Logical Design of an Electronic Computing Instrument

-- Arthur W. Burks
-- Herman H. Goldstine
-- John von Neumann

Components of the von Neumann Architecture

Input/Output (I/O)

Memory

Central Processing Unit (CPU)

Registers

Control Unit

Arithmetic Logic Unit (ALU)

Fetch Decode Execute Cycle

The CPU will pick off one instruction at a time from memory and execute it. This is called the Fetch Decode Execute Cycle.

  1. Fetch:
    • Move the instruction from memory to a special instruction register in the CPU.
    • This instruction is determined by the value in the program counter register.
    • The program counter is then incremented so that the next instruction can be fetched.
  2. Decode:
    • The control unit reads the instruction and determines what to do.
    • It preps the ALU and other components for the operation that will come next.
  3. Execute:
    • The ALU performs the operation on the data in the registers.
    • The intermediate result is stored in a special register called the accumulator.

By shuffling data between memory and registers, the CPU can perform all of the operations necessary to run a program.

We discuss these instructions in more detail in the "Evolution of Programming" page.

See: x86 instruction listings

Slight correction to the video: the program counter is incremented immediately after the instruction is fetched, not after it is executed.

The "JUMP 1" instruction does not skip the execution cycle. It updates the program counter on its execution.