Logic Gates

For an excellent logic gate sandbox, see: Logic.ly.

Foundations

Basic Gates

The logical connectives that we've learned so far have corresponding logic gates.

The truth table for each gate matches the truth table for the corresponding logical connective.

Let's try out some basic gates in Logic.ly.

Circuits

We can combine logic gates to create circuits.

These circuits can do things like:

Comparing Values

A magnitude comparator is a type of combinational circuit that compares two numbers.

One bit magnitude comparator:

One Bit Magnitude Comparator - Logicly

Assume that A = 1, B = 1.

For each output:

a) Translate the circuit into a boolean expression.

b) Plug the above values into the circuit and solve.

Hint: Remember your truth tables and the fact that 1 = true and 0 = false.

Output: A < B

a) ¬A ∧ B

b) 0 ∧ 1 = False

Output: A > B

a) A ∧ ¬B

b) 1 ∧ 0 = False

Output: A = B

a)

  • ¬( ¬A ∧ B ∨ A ∧ ¬B )
  • A ∨ ¬B ∧ ¬A ∨ B

b)

  • 1 ∨ (0 ∧ 0) ∨ 1
  • 1 ∨ 0 ∨ 1 = True

Keeping Values in Memory

SR (Set-Reset) Latch

The SR latch is a simple form of flip-flop that can store one bit of information as memory so that it isn't lost when the clock signal changes.

When in the hold state, the outputs remain the same.

They will only change when either the set or reset input is activated.

Circuit:

SR Latch - Logicly

Demo: Building an Arm and Click Camera

Scenario:

In this demo, we'll build a system that requires the user to arm a camera before taking a picture.

The camera has three buttons:

Components

Circuit:

Arm and Click Camera

Synchronizing Information

In digital circuits, we need to be precise about when information is updated.

The Clock

The clock is a special signal that is used to synchronize the operations of a computer. For now, we just need to know:

SR Flip-Flop

The SR flip-flop extends the SR latch by adding a clock signal.

This signal allows the flip-flop to store information only when the clock signal changes.

Inputs / Outputs:

Truth Table:

Same as above, except now the output can only change on a rising edge (uptick) of the clock signal.

Circuit:

SR Flip-Flop - Logicly

Demo: Building a Hold Activated Button

Scenario:

In this demo, we'll build a system that requires the user to hold a button (S) for a full clock cycle before a light turns on.

We will measure the time using the system clock (C). If the button is held for one clock cycle (rise and fall edge), the light will turn on.

There is a reset button (R) that can be used to turn off the light.

Components:

Circuit:

Hold Button